Curtiss-Wright Introduces Rugged Dual 4GSPS Transceiver for C4ISR Applications

By Caroline Rees / 18 Jun 2013

Curtiss-Wright Controls VPX3-530Curtiss-Wright Controls Defense Solutions, a business group of Curtiss-Wright Controls, has introduced a new dual channel ADC/DAC engine, the VPX3-530 that combines two (2) channels of 4 GSPS 12-bit ADC and two (2) channels of 14-bit DAC data conversion on a single, rugged 3U OpenVPX™ card. This next generation transceiver card also provides a user programmable Xilinx® Virtex®-7 FPGA to couple the ADC and DAC channels for very low latency between inputs and outputs. Designed for SWaP-constrained embedded digital receiver applications deployed in harsh defense and aerospace environments, the VPX3-530 is ideal for use in base stations, ground and airborne applications such as SIGINT, ELINT, SDR (Software Defined Radio), Radar Warning Receivers, and ECM Radar.

“Our new VPX3-530 ADC/DAC engine delivers the combined high data conversion rates and channel density previously only available in a 6U form-factor,” said Lynn Bamford, senior vice president and general manager of Curtiss-Wright Controls Defense Solutions. “This next generation ADC/DAC engine is ideal for SWaP-constrained C4ISR platforms and optimized with Curtiss-Wright’s ruggedization and packaging expertise.”

About the VPX3-530

The VPX3-530 combines multi-channel high-speed ADCs and DACs in a range of rugged build formats. The compact board provides support for up to four analog inputs, which can be configured as dual 4 GSPS/12-bit or four (4) 2 GSPS/12-bit channels. Each analog input is AC coupled via baluns for maximum ADC performance. The analog inputs are complemented with two (2) 5.6 GSPS 14-bit DACs.

The VPX3-530 also features a user programmable Virtex-7 VX690T FPGA (speed grade 2) a member of Xilinx’s 28nm 7-Series family. The FPGA is supported by two high speed DDR3L memory resources directly connected the FPGA. The FPGA configuration images can be stored in either the flash memory or DDR SDRAM configuration memory and can be updated by the host CPU using the PCI Express® (PCIe) interface. The DDR DRAM resource enables configurations to be downloaded from the host and bypass the non-volatile flash. Because SDRAM-based configuration is volatile, it is ideal for security sensitive applications and allows the VPX3-530 to be more easily declassified should the need arise.

The FPGA can be reconfigured from any one of a number of images indexed in the flash including a write protected recovery configuration. FPGA configuration from either flash or DDR SDRAM can also take advantage of AES encryption.

The VPX3-530 provides the choice of two (2) RF sample clock sources through the front panel. Modes are supported that allow synchronous ADC and DAC data sampling or independent sample clock for the ADCs and DACs. This allows coherent input and output sampling or the ability to operate the ADCs and DACs separately. To deliver maximum performance the VPX3-530 uses an external clock source instead of a local sample clock.

A key feature of the VPX3-530 is its ability to operate in a synchronous mode across multiple boards to form an array of synchronized analog inputs. This feature is critical for applications such as SIGINT/Direction Finding (DF) or other applications that require beamforming.

VPX3-530 Performance Features:

Dual 4 GSPS 12-bit or Quad 2 GSPS 12-bit analog inputs
Dual 5.6 GSPS 14-bit DAC update rate (maximum 2.8 GSPS data rate)
Multi-board, multi-channel synchronization
Xilinx® user programmable Virtex®-7 VX690T FPGA
Up to 8 Gbytes DDR3L SDRAM (64-bit data paths per bank)
3U OpenVPX™ compliant
Onboard power and temperature measurement
VxWorks® and Linux® host support
Air- and Conduction-cooled variants

Software Support

Software support for the VPX3-530 includes Curtiss-Wright’s FusionXF Development Kit which provides software, HDL and utilities complete with examples for using the VPX3-530. FusionXF includes a C programming language API, driver framework and sophisticated DMA support. One of the core elements to the FusionXF development kit is a framework that speeds and eases the addition of new IP functionality or capabilities to the FPGA. Software utilities are also provided for configuring the FPGA. These include flash programming and configuring the FPGA from one of many indexed images in flash memory. FusionXF supports Wind River® VxWorks® and Linux Fedora operating environments. Additional operating systems, such as Windows®, or other distributions can be considered on request.

Rugged Build Options

The VPX3-530 is offered in a wide range of ruggedization configurations, including commercial, air-cooled rugged and conduction-cooled.

Posted by Caroline Rees Caroline co-founded Unmanned Systems Technology and has been at the forefront of the business ever since. With a Masters Degree in marketing Caroline has her finger on the pulse of all things unmanned and is committed to showcasing the very latest in unmanned technical innovation. Connect & Contact